1. Field of the Invention
The invention relates to a recursive digital filter, the recursive portion of which includes:
a filter input;
a first circuit comprising a cascade arrangement of a quantizing device in the form of a magnitude truncator and adder means, the circuit having first, second and third inputs connected to the adder means, as well as an output coupled to one of the adder means, the first input being connected to the filter input;
a second and a third circuit for connecting the output of the first circuit to the second and third input, respectively of this first circuit and each being formed by a cascade arrangement of a multiplier arrangement and an auxiliary circuit.
The output signal of such a filter is obtained by forming a linear combination of the signals present in this recursive portion, for example the input signal and the two signals produced by the auxiliary circuits; or the input signal and the two signals produced by the multiplier arrangements.
2. Description of the Prior Art
As is known, a digital filter is an arrangement for filtering a digital input signal and producing a digital output signal.
A digital signal is a series of numbers. These numbers occur at fixed, equidistant instants. They are produced by a digital circuit or, for example, an analog-to-digital converter in which an analog signal is sampled. The distance between two successive instants at which a number occurs is sometimes referred to as the sampling period and this quantity will be designated by the symbol T. Each number comprises a plurality of bits. One bit usually indicates the polarity of the number and the other bits characterize the magnitude of this number. These last mentioned bits are therefore sometimes referred to as magnitude bits. A predetermined value or significance is assigned to each magnitude bit. The most significant magnitude bit usually has the value (1/2).sup.1 and the least significant magnitude bit the value (1/2).sup.N. Herein N represents the total number of magnitude bits of the number. Hereafter, as is common practice, this number of magnitude bits will be designated "word length".
Magnitude truncation is an operation performed on the magnitude bits of a number having a word-length m+r, whereby the r magnitude bits which are less significant than the least significant magnitude bit of the first m significant magnitude bits of that number are discarded, which results in a quantized number having a wordlength m.
Recursive digital filters of the type defined above and wherein only one quantizing arrangement is used in the recursive portion are described in the references 1-5 listed below. More particularly, each of the just two references describes a recursive digital filter in which the quantizing arrangement is in the form of a magnitude truncator.
As can be seen from these references, in these prior art recursive digital filters the first circuit is formed by first and second cascade-arranged adders, the first adder having its input connected to the filter input and its output to the output of the first circuit. The magnitude truncator is arranged either between the two adders or between the output of the first adder and the output of the first circuit. A typical prior-art filter is described in greater detail hereinafter.
The second circuit is formed by an auxiliary circuit in the form of a memory element whose output is connected to the input of a first constant-factor multiplier. The memory element, having a fixed storage time, and having its input connected to the output of the first circuit. The first constant-factor multiplier multiplies the signal applied thereto by a constant multiplication factor a.sub.1 and has its output connected to an input of the second adder.
The third circuit is also formed by an auxiliary circuit in the form of a storage element, the output of which is connected to the input of a second constant-factor multiplier. The storage element in this third circuit has a storage time which is twice as long as the storage time of the storage element in the second circuit and the input thereof is connected to the output of the first circuit. The second constant-factor multiplier multiplying the signal applied thereto by a constant multiplication factor a.sub.2 and having its output connected to the other input of the second adder.
In the second and third circuits a number stored in the associated storage element is multiplied by a constant factor a.sub.1, a.sub.2, respectively, Thus product numbers are produced each having a wordlength equal to the sum of the wordlengths of the numbers which were multiplied by each other. Two of these product numbers are added together in the second adder to form a sumnumber. This sumnumber is applied to the two storage elements and stored therein. The storage capacity of these storage elements must be adapted to the wordlength of these sumnumbers. The quantizing arrangement ensures that the storage capacity of the storage elements can be limited to a predetermined number of bits. To this end, as mentioned above, this quanitzing arrangement may be in the form of a magnitude truncator in which the wordlength of the sumnumber is limited by means of magnitude truncation. Alternatively, this quantizing arrangement may be of such a construction that the sum is rounded therein.
In all cases the quantizing arrangement performs a nonlinear operation on the sumnumbers. This results in that, in the recursive portion of the digital filter, all kinds of unwanted oscillator phenomema may occur which also affect the output signal of the filter, as this output signal is formed by a linear combination of signals present in this recursive portion.
Unwanted oscillation phenomena of this type are known as limit cycles. The specific form of such a limit cycle as regards its amplitude and period depend on the one hand on the operation performed in the quantizing arrangement and on the other hand on the nature of the input signal. A necessary condition for a limit cycle is that the input signal is either constant or periodic.
If in the quantizing arrangement magnitude truncation is effected in the manner described in Reference 1, then it appears that:
(a) if the input signal is constant and equal to zero, limit cycles having periods equal to once, twice or four times the sampling period T of the input signal will definitely not be generated, while furthermore the change of a limit cycle having another period being generated is very small.
(b) if the input signal is constant and unequal to zero, then many limit cycles may occur.
(c) if the input signal is periodical, then many limit cycles may be generated.
If in the quantizing arrangement controlled rounding is effected in the manner described in Reference 3, then it appears that:
(a) if the input signal is constant and equal to zero no limit cycles can occur.
(b) if the input signal is constant and unequal to zero, only limit cycles whose period is equal to once and/or twice the sampling period T can occur.
(c) if the input signal is periodical, having a period which is equal to twice the sampling period T, then limit cycles whose period is equal to once and/or twice the sampling period T can occur.